1. Field of the Invention
The present invention relates generally to techniques for effectively implementing vector operation using a processor chip that is provided with a vector unit, and more specifically to a method of implementing vector operation either within the processor chip or outside this chip depending on vector lengths.
2. Description of the Related Art
When a computer application requires a very large amount of computation to be completed in a reasonable time duration, so-called supercomputers are used. Such computers are needed to handle vectors of data as efficiently as possible. As is known, a vector is a linear array of numbers (elements).
In view of markedly increasing efficiency of vector computation, it is highly desirable to provide a vector unit in addition to a scalar unit on the same processor chip. However, it is not practical to provide the scalar and vector units on the same chip due to a very limited space. Therefore, when the vector data is to be implemented, the processor chip accesses a vector unit provided outside the chip. However, when the vector data, all of which have small vector lengths, are to be processed, it is not desirable to use the vector unit which is provided outside of the processor chip.